کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
448856 1443163 2014 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Hardware compression scheme based on low complexity arithmetic encoding for low power image transmission over WSNs
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
Hardware compression scheme based on low complexity arithmetic encoding for low power image transmission over WSNs
چکیده انگلیسی
Software implementation costs of most algorithms, designed for image compression in wireless sensor networks, do not justify their use to reduce the energy consumption and delay transmission of images. Even though the hardware solution looks to be very attractive for this problem, a specific care should be paid when designing a low power algorithm for image compression and transmission over these systems. The aim of this paper is to present and evaluate a hardware implementation for user-driven image compression scheme designed to respect the energy constraints of image transmission over wireless sensor networks (WSNs). The proposed encoder will be considered as a co-processor for tasks related with image compression and data packetization. In this paper, we discuss both of the hardware architecture and the features of this encoder circuit when prototyped on FPGA (field-programmable gate array) and ASIC (application-specific integrated circuit) circuits.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: AEU - International Journal of Electronics and Communications - Volume 68, Issue 3, March 2014, Pages 193-200
نویسندگان
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