کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
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449232 | 1443195 | 2011 | 11 صفحه PDF | دانلود رایگان |
High reliability against undesirable effects is one of the key objectives in the design of on-chip networks. This paper presents a very low cost fault-tolerant routing method to tolerate faulty links and routers in mesh-based Networks-on-Chip. This new algorithm can be dynamically reconfigured to support irregular topologies caused by faulty components in a mesh network. In addition, it is a distributed, adaptive and congestion-aware routing algorithm where only two virtual channels are used for both adaptiveness and fault-tolerance. The proposed routing method has a multi-level fault-tolerance capability and therefore it is capable to tolerate more faulty components in more complicated faulty situations with additional hardware costs. The network performance, fault-tolerance capability and hardware overhead are evaluated through appropriate simulations and syntheses. The experimental results show that the overall reliability of a Network-on-Chip is significantly enhanced against multiple component failures with only a small hardware overhead.
Journal: AEU - International Journal of Electronics and Communications - Volume 65, Issue 7, July 2011, Pages 630–640