Implementation of harmony search on embedded platform

Harmony Search (HS) is relatively a new population-based meta-heuristic optimization algorithm that imitates the music improvisation process of musicians to search for a perfect state of harmony. HS has attracted a lot of attention by showing excellent results for a wide range of optimization problems in diverse fields. HS is typically implemented on a software platform, which restrict its applications to real-time applications. In order to accelerate the algorithm, one can proceed with the parallelization of the algorithm and/or map it directly onto hardware to achieve faster execution time. This paper presents an efficient architecture for parallel HS algorithm in FPGA platform in order to improve HS performance in terms of execution time, resource utilization and power consumption while searching several solution candidates for a problem. The implementation is tested using a suite of well-known benchmark functions. Analysis of the experimental results show that the proposed concurrent implementation has a promising performance up to 175x and no less than 16x as compared with software implementation.