CORDIC-based VLSI architecture for real time implementation of flat top window

Since decades, popular window techniques such as Hanning, Hamming, Blackman and Flat top window have been used to minimize unwanted effects like spectral leakage and scalloping losses due to direct truncation of signals before fast Fourier transform (FFT) processor. Conventionally, software and further ROM based implementation of aforesaid window functions have been adopted for real time applications where throughput in the case of software implementation and flexibility in the case of ROM based implementation are the main constraints. Recently, variable length FFT architectures to support wide range of applications in the domain of signal, image and communication system have been developed which demand variable length window architectures. To the knowledge of authors, window techniques such as Hanning, Hamming and Blackman are addressed for real time VLSI implementation; however one of the popular window technique, i.e. flat top window has not been addressed for efficient VLSI implementation. In this context, authors in this paper have proposed a novel, flexible and hardware efficient VLSI architecture for flat top window using CORDIC (Co-ordinate rotation digital computer) along with control units to ensure high throughput. This proposed VLSI architecture for implementing flat top window function is prototyped on commercially available FPGA (Field Programmable Gate Array) device, i.e. Spartan 3E XC3S500E. The first order analysis along with implementation results and error analysis of proposed architecture are highlighted.