کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
4971415 1450523 2017 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs
چکیده انگلیسی
In this work, bitstream based SEU emulators are updated to consider MCUs. It is discussed the necessity of injecting faults on physically adjacent cells, in order to emulate appropriately the effect of MCUs. Adjacent MCU injection has been compared theoretically with an approach considering MCUs as bunches of independent SBUs, as it is done in other emulation platforms. A Zynq-based fault injection platform has been used, in order to apply this way of emulating MCUs and validate the proposal.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 78, November 2017, Pages 85-92
نویسندگان
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