Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories

For the technologies considered in this paper, on the one hand we demonstrate a maximal threshold voltage drop of 2 V for a 4 Gbit Flash array and we provide design recommendations, and on the other hand we demonstrate that a maximal word length of 32 bits for ReRAM can be achievable in a ReRAM matrix. The presented methodology can easily be extended to any memory technology.