Analysis of flicker and thermal noise in p-channel Underlap DG FinFET

• p-Channel noise analysis for Underlap DG FinFETs is novel work.
• Initially, we validated the current model with experimental result then go for validation of flicker noise.
• As underlap length is more significant for ultrathin body. The current model is also tested for 35 nm device.
• Analysis of flicker and thermal noise were performed for the proposed device.

In this paper, we analyze the flicker and thermal noise model for underlap p-channel DG FinFET in weak inversion region. During the analysis of current and charge model, minimum channel potential i.e. virtual source is considered. Initially, the drain current for both long and short channel of DG FinFET are evaluated and found to be well interpreted with experimental results. Further, the flicker and thermal noise spectral density are derived. The flicker noise power spectral density is compared with published experimental results, which shows a good agreement between proposed model and experimental result. During calculation we have considered variation of scattering parameter and furthermore, the degradation of effective mobility is taken into account for ultrathin body. The variation of structural parameters such as gate length (Lg), body thickness (tSi) and underlap length (Lun) are also considered. The degradation of gate noise voltage with frequency, underlap length and gate length signify that p-channel DG FinFET device can be a promising candidate for analog and RF applications.