Single and dual gate OTFT based robust organic digital design

• Performance analysis and comparison of single gate (SG) and dual gate (DG) OTFTs based inverters.
• Observed that mobility of DG OTFT is almost five times higher than the SG.
• Improved gain and noise margins of both DLL and ZVLL configurations using DG OTFT.
• Using DG OTFTs, the propagation delay reduced by 59% for DLL and 42% for ZVLL in comparison to SG.
• Bootstrap and back gate bias technique further enhanced the noise margin and gain.

This paper analyzes and compares the performance of the single gate (SG) and dual gate (DG) organic thin film transistors (OTFTs) based inverter circuits. The DG-OTFT device performs better than SG-OTFT mainly in terms of mobility, on–off current ratio and sub-threshold slope. The mobility of DG device is almost five times higher than the SG, while, an increase of 74% in on–off current ratio and a decrease of 41% in sub-threshold slope are observed. Two different configurations of inverter circuits i.e. diode-load logic (DLL) and zero-Vgs-load logic (ZVLL) are studied. The static and dynamic behaviors of the p-type DLL and ZVLL inverters using SG and DG organic transistors are observed. The DG-OTFT improves gain and noise margins for both DLL and ZVLL inverter circuits. Using DG device, propagation delay reduces by 59% for DLL and 42% for ZVLL as compared to SG OTFT based configurations. Moreover, fixed back gate bias technique further enhances the noise margin and gain by 8% and 18% for DLL and 19% and 26% for ZVLL configurations, respectively. Finally, bootstrapping technique is also applied to the dual gate inverters that further boosts the noise margin and gain for DLL and ZVLL configurations.