Numerical analysis of localised charges impact on static and dynamic performance of nanoscale cylindrical surrounding gate MOSFET based CMOS inverter

In the present work, effect of stress/hot carrier/process damage/radiation damage induced localised/fixed charges on static and dynamic performance of CMOS inverter using nanoscale cylindrical surrounding gate (SRG) MOSFET has been studied. Significant threshold voltage shift, drain current and transconductance degradation due to induced localised charges at the Si–SiO2 interface of the SRG p-MOSFET (used as load) give rise to inverter performance degradation in terms of change in its voltage transfer characteristics, noise margin and propagation delay. Four different localised charge density profiles have been used to in order to estimate the performance degradation due to localised charges.