Ageing effect on electromagnetic susceptibility of a phase locked loop

Phase locked loop in radiofrequency and mixed signal integrated circuit experience noise as electromagnetic interference coupled on input and power supply which translates to the timing jitter. Most of PLL noise analysis did not take into account the ageing effect. However device ageing can degrade the physical parameters of transistors and makes noise impact worse. This paper deals with the analyses of PLL immunity drift after accelerated ageing.