Microscopic stress simulation of non-planar chip technologies

Finite element simulations were used to study the thermo-mechanical stress state at the chip corner in a chip-package system. Accurate geometry of a non-planar chip topology was created by digitizing images obtained with a scanning electron microscope through focused ion beam cuts. Nested sub-modeling approach was utilized in order to simulate the a few microns region of interest, which is very small, compared to 1 cm package size. Available material models were used and unavailable materials were characterized. Thermal loads for the complete set of fabrication process from the wafer initialization to the final qualification phase were considered for this work. Cracks arising in passivation due to thermo-mechanical loads were a concern. Stress simulations on this chip-package system were carried out and compared between planar and non-planar geometries of the same. It was found that the accuracy of stress values largely depend on the precise geometry input for simulation. Preliminary finite element models were optimized to achieve accuracy in the simulation results. The stress measured on test chips with integrated stress cells. The simulation results are in good agreement with these experimental values. This also helped to validate the material models and simulation methodology reported in this paper.