Employing vertical dielectric layers to improve the operation performance of flash memory devices

A number of new device structures have been reported recently to improve the operation performance of flash memory. In this work, a novel flash device with a vertical dielectric layer in the depletion region is proposed through simulation approach. The simulation results show that the employment of a vertical dielectric layer in the depletion region can improve the operation performance of flash memory. The improvement can be attributed to a lower potential in the central region of device channel and the increase of the potential drop in the channel direction near drain junction. Thus, this proposed vertical dielectric layer increases the electrical field of the channel and thus the probability and the momentum of electron injection. The operation characteristics of the flash device with a vertical dielectric layer in the depletion region of source and drain are superior to those without. In addition, it is found that a vertical dielectric layer with lower dielectric constant can enhance the operation performance of flash device even more.