A numerical failure analysis on lead breakage issues of ultra fine pitch flip chip-on-flex and tape carrier packages during chip/film assembly process

As the lead pitch gets finer, numerous problems emerge during manufacturing process of LCD packages. Lead breakage failure at ultra fine pitch (around 30 μm and under) chip/film assembly stage would be one of them. In this paper a failure analysis process on this issue is presented. In order to figure out more detailed phenomena that occurred at miscellaneous area for a very short instant, a numerical approach is utilized along with tests and measurements. A verified/predictive finite element model is developed and applied on flip chip-on-flex and tape carrier packages for LCD applications. The root causes of the lead breakage and dominant effecting factors are identified through various tests and simulations. Design/process guidelines for the packages are proposed to mitigate or remove the risk of the failure.