Analysis of punch-through breakdown in bulk silicon RF power LDMOS transistors

The design and electrical performance of bulk silicon power LDMOS transistors for base station applications are analyzed in this paper. Power LDMOS transistors have been fabricated with a seven mask levels process technology including a LOCOS oxide in the drift region and a polysilicon field plate. Specific on-state resistances in the range of 3 mΩ × cm2 have been experimentally measured on fabricated LDMOS transistors with a voltage capability of 80 V and a threshold voltage around 2.5 V. Moreover, the impact of the basic geometrical and technological parameters on the voltage capability and on the on-state resistance is also analyzed. Special emphasis has been made on the existence of a premature breakdown by a punch-through mechanism due to the combination of a low Boron dose in the body region and an excessive phosphorous dose in the drift region. Technological solutions for avoiding this undesired phenomenon are also discussed.