کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
546336 | 871887 | 2006 | 8 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Failure analysis and solutions to overcome latchup failure event of a power controller IC in bulk CMOS technology
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موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
Latchup failure which occurred at only one output pin of a power controller IC product is investigated in this work. The special design requirement of the internal circuits causes the parasitic diode that is inherent between the n-well and p-substrate to be a triggering source of the latchup occurrence in this IC. The parasitic diode of the internal PMOS was easily turned on by an anomalous external signal to trigger the neighbor parasitic Silicon Controlled Rectifier (SCR) path which causes latchup event in the CMOS IC product. Some solutions to overcome this latchup failure have been also proposed in this paper.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 46, Issue 7, July 2006, Pages 1042-1049
Journal: Microelectronics Reliability - Volume 46, Issue 7, July 2006, Pages 1042-1049
نویسندگان
Shih-Hung Chen, Ming-Dou Ker,