کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
546755 1450546 2015 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Design and analyze of transient-induced latch-up in RS485 transceiver with on-chip TVS
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Design and analyze of transient-induced latch-up in RS485 transceiver with on-chip TVS
چکیده انگلیسی


• The occurrence of transient induced latch up (TLU) in RS485 transceiver IC with on-chip Transient Voltage Suppressor (TVS) under electrical fast transient (EFT) test is studied.
• The TLU immunity of RS485 transceiver against EFT test has been significantly enhanced by some good layout measures.
• Latch-up and EMMI tests are used for confirming the reason and position of latch-up.

The occurrence of transient induced latch up (TLU) in RS485 transceiver IC with on-chip Transient Voltage Suppressor (TVS) under electrical fast transient (EFT) test is studied. A RS485 transceiver fabricated by a 0.5-μm CDMOS process was used in the test, the latch-up and emission microscope (EMMI) tests are used for confirming the reason and position of latch-up. The trigger current injecting into the transceiver through RO port and generating the substrate current is the major cause of TLU under EFT test. Some measures in layout are taken to improve the TLU immunity of RS485 transceiver against EFT test.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 55, Issues 3–4, February–March 2015, Pages 637–644
نویسندگان
, , , ,