Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS

Negative-bias temperature instability (NBTI) and positive-bias temperature instability (PBTI) weaken PFETs and high-k metal-gate NFETs, respectively. This paper provides comprehensive analyses on the impacts of NBTI and PBTI on wide fan-in domino gates with high-k metal-gate devices. The delay degradation and power dissipation of domino logic, as well as the Unity Noise Gain (UNG) are analyzed in the presence of NBTI/PBTI degradation. It has been shown that the main concern is the degradation impact on delay which can increase up to 16.2% in a lifetime of 3 years. We have also proposed a degradation tolerant technique to compensate for the NBTI/PBTI-induced delay degradation in domino gates with a negligible impact on UNG and power.

► We analyze the impacts of NBTI and PBTI in wide fan-in domino gates.
► NBTI/PBTI degradations increase delay and UNG and decrease power.
► Upsizing just the inverter PFET can compensate for the delay degradation.
► Upsizing the inverter PFET has a negligible impact on UNG and power.