Effect of interface charge on the dc bias stress-induced deformation and shift of the transfer characteristic of amorphous oxide thin-film transistors

The presence of a deformation or hump in the subthreshold region of the transfer characteristic of Amorphous Oxide Semiconductor (AOS) Thin-Film Transistors (TFTs) has been observed after DC stress and related to different causes. In previous works, it has been shown that in devices with active-layer thickness greater than 120 nm, a region with relatively high conductivity remains near the back interface of the active layer, providing a parallel current path between drain and source giving rise to this deformation. If this is the cause of the hump, it should be present independently of bias stress. However, experiments show that the hump is observed in AOS TFTs with active layer thickness below 120 nm and only after DC stress. In this work we show that, if during DC bias stress, the density of positively charged states at the interface between the active layer and the passivation layer of an AOS TFT becomes high enough to provide a parallel conduction path, the deformation or hump in the transfer curve can appear. This condition is more likely to occur in devices passivated with dielectrics that can present charged traps at the dielectric–semiconductor interface and agrees well with experimental data reported for AOS TFTs.