Effect of localised charges on nanoscale cylindrical surrounding gate MOSFET: Analog performance and linearity analysis

The paper presents a simulation study of Nanoscale Cylindrical Surrounding Gate (SRG) MOSFET with localised interface charges. The objective of the present work is to study the performance degradation due to hot carrier induced/radiation induced/stress induced damage in the form of localised/fixed charges at the semiconductor/oxide interface of the device. Impact of fixed charges has been studied on the characteristics such as drain current, transconductance and its higher order terms, device efficiency and linearity FOMs. Effect of nature and extension of interface fixed charges has been discussed in detail through extensive simulation. Circuit reliability issues of the device are discussed in terms of DC bias point degradation.