Prediction of crack growth in IC passivation layers

The aluminium interconnect structures of ICs consists of materials with a large difference in the coefficient of thermal expansion (CTE). The IC backend and packaging processes are characterized by many temperature differences that will generate thermo-mechanical stresses in these interconnect structures. The resulting stress levels can lead to crack propagation in the brittle dielectric and passivation layers. To investigate the sensitivity to crack propagation in these materials, finite element simulations are performed using a J-integral approach. The J-integral approach is used to predict the crack stability for different crack lengths, positions and directions. The obtained results with respect to critical initial cracks match with field observations in actual IC interconnect structures.