A novel partial-SOI LDMOSFET (>800 V) with n-type floating buried layer in substrate

• New P-SOI LDMOS structure with n-type floating buried layer in the substrate.
• The proposed structure improves the BV and reduces specific on-resistance.
• Self-heating effects are also suppressed in the proposed structure.

In this paper, a novel high voltage lateral double diffused metal–oxide–semiconductor (LDMOS) field effect transistor based on partial silicon-on-insulator (PSOI) technology is proposed and investigated based on the numerical simulations. The structure is characterized by an n-type floating buried layer (NFBL) in the substrate under the silicon window near the drain. The buried layer in the substrate modulates the lateral and vertical electric field, which results in the electric field of the drift region distributed uniformly. Therefore, the breakdown voltage (BV) of the device is significantly improved. The influences of the key parameters on device performance of the proposed structure are discussed. Moreover, the self-heating effect (SHE) is greatly alleviated duo to the silicon window helps thermal conduction to the substrate, which improved the reliability of device application.