کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
548361 872209 2008 6 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Degradation of n-channel a-Si:H/nc-Si:H bilayer thin-film transistors under DC electrical stress
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Degradation of n-channel a-Si:H/nc-Si:H bilayer thin-film transistors under DC electrical stress
چکیده انگلیسی

Bottom-gated n-channel thin-film transistors (TFTs) were fabricated, using as channel material hydrogenated amorphous silicon (a-Si:H)/nanocrystalline silicon (nc-Si:H) bilayers, deposited at 230 °C by plasma-enhanced chemical vapor deposition, and SiNx as gate dielectric. The stability of these devices is investigated under three bias stress conditions: (i) gate bias stress (VG = 25 V, VD = 0), (ii) on-state bias stress (VG = 25 V, VD = 20 V) and (iii) off-state bias stress (VG = −25 V, VD = 20 V). It is found that the TFT degradation mechanisms are strongly dependent on the bias stress conditions, involving generation of deep and tail states in the active area of the channel material, carrier injection (electrons or holes) within the gate insulator and generation of donor trap states at the gate insulator/channel interface. The common features and the differences observed in the degradation behaviour under the different bias stress conditions are discussed.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 48, Issue 4, April 2008, Pages 531–536
نویسندگان
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