On-chip circuit to monitor long-term NBTI and PBTI degradation

• A circuit for long-term on-chip measurement of BTI has been designed and demonstrated.
• The circuit can distinguish between NBTI and PBTI.
• The measurement can be done without the use of external test equipment.
• The circuit has been demonstrated with polysilicon gate and high-k metal gate CMOS technologies.

A circuit for on-chip monitoring bias-temperature instability (BTI) degradation of CMOS devices, which distinguishes between NBTI and PBTI, is described. Intended for long-term monitoring of field-installed systems, the measurements are performed entirely on chip, and reported through digital scan chains. The circuit measures the frequency degradation of conventional inverters, and separately measures the degradation due only to NBTI and only to PBTI. The measurement time is very short compared to off-chip measurements. The operation of the circuit is demonstrated with examples from polysilicon gate technology and high-k/metal-gate technology.