BTI, HCI and TDDB aging impact in flip–flops

• We evaluate aging effects in flip-flops.
• Different flip-flop circuits are evaluated.
• Different aging effects (BTI, HCI and TDDB) are taken into account.
• FF circuit performances are compared through electrical simulations.
• New method of aging analysis in CMOS logic gates is applied.

This work presents a comparative analysis of aging impact in CMOS flip–flops. Five different static flip–flop topologies have been evaluated based on an aging estimation method previously proposed for combinational circuits. BTI, HCI and TDDB are taken into account in such investigation, considering the individual and combined influences. The operation degradation of each transistor present in the flip–flop circuit is provided by the applied methodology. Moreover, electrical simulations were carried out in order to compare all five flip–flops evaluated in terms of propagation delay increasing. This work demonstrates that the impact of wearout mechanisms might be considered as an important design parameter in the choice of the most appropriate flip–flop in specific applications.