Reliability issues of double gate dielectric stacks based on hafnium dioxide (HfO2) layers for non-volatile semiconductor memory (NVSM) applications

In this study, we present selected reliability issues of double gate dielectric stacks for non-volatile semiconductor memory (NVSM) applications. Fabricated gate structures were consisted of PECVD silicon oxynitride layer (SiOxNy) as the pedestal layer and hafnium dioxide layer (HfO2) as the top gate dielectric. In the course of this work, obtained MIS structures were investigated by means of current–voltage characteristics, as well as applying dc stresses in constant current (CCS) and voltage (CVS) mode. Presented results have shown that the application of ultra-thin PECVD silicon oxynitride layer results in significant increase of breakdown voltage value in comparison to MIS structure with only hafnia as the gate dielectric. Moreover, due to the high temperature annealing of deposited SiOxNy layers, MIS device demonstrates much lower leakage currents, as well as higher breakdown voltage values in comparison to device with ‘as-deposited’ SiOxNy bottom layer. The results also proved larger immunity to dc stresses and better retention characteristics of MIS devices with ‘annealed’ oxynitride, in comparison to ‘as-deposited’ pedestal layer.

► Reliability issues of double gate dielectric stacks for NVSM applications are presented.
► Comprehensive electrical characterization was performed.
► Different degradation mechanisms after CVS and CCS were observed.
► MIS stacks with annealed SiOxNy achieves relatively high retention time.
► Better uniformity of Ubr for stacks with annealed oxynitride was demonstrated.