Reliability modeling on a MOSFET power package based on embedded die technology

Embedding of discrete semiconductors into substrates has the advantages of achieving high degree of miniaturization, good electrical performance and possible low cost. A MOSFET power package based on the embedded die technology was developed and the demonstrators were built. To reduce cost and time-to-market, thermo-mechanical virtual prototyping is applied to support the package development. 2D and 3D parametric FE models were established to conduct numerical simulations to investigate the thermo-mechanical reliability performance under packaging processes and test conditions. The package design and material variations, such as the thicknesses of the Cu layer and the resin in the RCC foil, the Bond Line Thickness (BLT), the thickness and material properties of prepreg, via dimensions and via-filling, were included in the parametric models. The root cause for die cracking, delamination between the interface die/RCC foil, and cracking of Cu vias were analyzed based on the simulation results. Verification of the modeling results was conducted through comparison with the test results. The results indicate that the prediction from the FE modeling matches reasonably well with the test results.