Dynamic responses of PCB under product-level free drop impact

The peak value of out-of-plane displacement of printed circuit board (PCB), when it is subjected to drop impact, is a major concern to electronic manufacturers as it relates to the maximum stress causing failure for the solder balls. In this work, the full-field dynamic responses of printed circuit boards (PCBs) of product level are measured and analyzed in detail with the aid of Digital Image Correlation (DIC) method. In contrast to the board level drop test, which can be more easily instrumented by following the JEDEC test standards, the product-level drop test requires great effort in controlling the impact orientation, which is critical to ensure the consistency of test results. Moreover, carefully guided free drop condition is essential in investigating the mechanical dynamic behaviors of PCBs to capture the realistic dynamic behaviors during free drop impact. Several effects of test variables, such as drop height, PCB supports, casing shape, and battery weight distribution, are carefully studied case by case. Along with the free drop impact experiments, the 3D FEA models are analyzed using ANSYS/LS-DYNA™. The simulation studies and experimental results are useful for improving the design of cellular phones with lower PCB deflection under impact shock.