Design and evaluation of a new structure for fault-tolerance full-adder based on quantum-dot cellular automata

Quantum-dot Cellular Automata (QCA) has emerged as an attractive alternative to Complementary Metal Oxide Semiconductor (CMOS) technology in the nanoscale era. In designing arithmetic circuits, an efficient adder can play a significant role. The next generation of digital systems will be used QCA as desired technology. The QCA computational and arithmetic systems will be facilitated using an efficient QCA-based full-adder. The defects of manufacturing and variations still remain as a problem in QCA-based circuits. Being unreliable and error-prone are the weaknesses of these circuits. Therefore, in this paper, a novel QCA-based fault-tolerant full-adder design using cells redundancy is suggested. Three elements such as misalignment, missing and dislocation cells are important in analyzing the fault properties. Further, this paper aims to study the functionality and the fault-tolerant property of the proposed full-adder in the presence of QCA deposition faults. The obtained results using QCADesigner have demonstrated the proposed full-adder has better performance in terms of latency, complexity, and area in comparison to the previous full-adder designs. Also, the redundant version of full-adder has simple and strong structure compared to standard styles.