Leakage current, active power, and delay analysis of dynamic dual Vt CMOS circuits under P-V-T fluctuations

► P-V-T fluctuations can result in reliability problems in the dynamic CMOS circuits. ► Under P-V-T fluctuations, dual Vt technique is effective to reduce power and leakage. ► Under P-V-T fluctuations, dual Vt technique is also induces speed penalty. ► The robustness of different circuits against the P-V-T fluctuations is different.