Streamline calibration modelling for a comprehensive design of ATI-based digitizers

The most recent digitizers available on the market can grant real-time bandwidth up to 70 GHz and beyond. Such a performance is achieved by transforming the signal at the analog front-end in order to produce two or more instances characterized by reduced bandwidth; the different instances are acquired by means of less demanding ADCs and combined to regain a digital representation of the input signal over the original bandwidth. Also, these digitizers use massive digital signal processing to perform the necessary calibration. However, the specific implementations that make calibration and reconstruction possible are carefully kept secret by the manufacturers. Here a proposal for streamline calibration and reconstruction of an ATI-based digitizer is illustrated and validated.