کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
728125 892823 2009 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Internal jitter noise measurement procedure of a switched capacitor circuit
موضوعات مرتبط
مهندسی و علوم پایه سایر رشته های مهندسی کنترل و سیستم های مهندسی
پیش نمایش صفحه اول مقاله
Internal jitter noise measurement procedure of a switched capacitor circuit
چکیده انگلیسی
In this paper, an original method to estimate the internal jitter of a discrete time Sigma Delta modulator is presented. As internal jitter measurement of this component is difficult, a simple test circuit using the same switched capacitor architecture is developed. It means that the elementary blocks used to design this test circuit are the same ones used in the Sigma Delta (ΣΔ) modulator. The method used to estimate the internal jitter is based on the well-known 'locked histogram method' which consists on using the same frequency for the sine wave generator and the clock generator. A statistical analysis of the output signal provides the statistical properties of all noise contributions (thermal noise, generator noises and internal jitter). By using different frequency test values and with the help of the least square method, the statistical properties of the internal jitter noise is extracted.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Measurement - Volume 42, Issue 1, January 2009, Pages 1-8
نویسندگان
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