Elimination of drift-like errors in intelligent cyclic A/D converters

The paper presents a new method of elimination of influence of drift-like errors in so called intelligent cyclic A/D converters, in particular, errors caused by drifts (droops) of voltage at the output of sample-and-hold blocks. The method is based on application of the extended multi-dimensional algorithm, which estimates simultaneously values of the input sample and drift rate. Implementation of the extended algorithm in the intelligent cyclic A/D converters requires only insignificant changes in the digital part of the converter and does not increase their production costs. The motivations to these investigations resulted from practical realizations of the intelligent cyclic A/D converter in CMOS technology and difficulties in design of a precise sample-and-hold circuit. The results of selected simulation experiments related to analysis of influence of a droop rate on the final performance of the intelligent cyclic A/D converters employing the standard (one-dimensional) and extended algorithms are discussed and compared in the paper. The results of experiments show that application of the proposed solution enables efficient functioning of the converters even in the presence of relatively large drifts.