Study of small size wavelet transform processor and wavelet inverse-transform processor using SAW devices

The objective of this research was to investigate the possibility of reducing the sizes of dyadic wavelet transform processor and dyadic wavelet inverse-transform processor using surface acoustic wave (SAW) devices. The motivation for this work was prompted by these processors which are of large sizes. Although these processors are being used, many fields need small size processors, so this work proposes two novel methods of reducing the sizes of these processors: firstly, the architecture which is that various interdigital transducers (IDTs) stand in a line is used to reduce the sizes of these processors. In this architecture, when the electrode-pairs numbers of various IDTs are larger than 20, the bulk acoustic wave (BAW) is eliminated, so this architecture cannot only reduce the sizes of these processors, but also eliminate BAW; secondly, as long as the electrode-overlap envelopes of IDTs will weaken fast with time t, the sizes of these processors are also reduced.