A novel and low-cost multi-stage approach for the fabrication of silicon nano-structures

• We propose a new technique for fabrication of p-type silicon nanostructure array.
• We propose a non-lithography and cost effective method to fabricate nanostructures.
• Such a method also allows for control over density and size of nanostructure array.
• Such a nanostructure could have applications in energy storage and solar cells.

A new multi-stage technique for the fabrication of arrays of silicon nano-structures is introduced; the growth mechanism of the developed nano-structures is investigated. In this technique, surface of silicon wafers were textured using anisotropic etching method to generate pyramid structures. The textured surfaces were then etched by electrochemical anodic etching. During anodic electrochemical etching in HF solution, the etching initiated at the edge of the pyramids and progressed inward through the faces. The four 1 1 1 faces of the pyramids etched forming a pore at each face. To develop the nano-structures, at the final fabrication stage, the interconnected walls have been etched using NaOH. Results show that the tip of pyramids corresponds to the tip of nano-structures. A good correlation between the number of pyramids per unit surface area and that of the nano-structures was observed. It was also observed that the nano-structure formed only for high pyramid surface coverage. The effect of anodic electrochemical parameters such as current density and etching time on the fabrication of the silicon nano-structure was investigated. Longer electrochemical etching resulted in thinner interconnect walls, needing shorter NaOH etching time to form and reveal the nano-structure array.