Improved interface and electrical properties of atomic layer deposited Al2O3/4H-SiC

In this paper we demonstrate a process optimization of atomic layer deposited Al2O3 on 4H-SiC resulting in an improved interface and electrical properties. For this purpose the samples have been treated with two pre deposition surface cleaning processes, namely CP1 and CP2. The former is a typical surface cleaning procedure used in SiC processing while the latter have an additional weak RCA1 cleaning step. In addition to the cleaning and deposition, the effects of post dielectric annealing (PDA) at various temperatures in N2O ambient have been investigated. Analyses by scanning electron microscopy show the presence of structural defects on the Al2O3 surface after annealing at 500 and 800 °C. These defects disappear after annealing at 1100 °C, possibly due to densification of the Al2O3 film. Interface analyses have been performed using X-ray photoelectron spectroscopy (XPS) and time-of-flight medium energy ion scattering (ToF MEIS). Both these measurements show the formation of an interfacial SiOx (0 < x < 2) layer for both the CP1 and CP2, displaying an increased thickness for higher temperatures. Furthermore, the quality of the sub-oxide interfacial layer was found to depend on the pre deposition cleaning. In conclusion, an improved interface with better electrical properties is shown for the CP2 sample annealed at 1100 °C, resulting in lower oxide charges, strongly reduced flatband voltage and leakage current, as well as higher breakdown voltage.