Wide dynamic range FPGA-based TDC for monitoring a trigger timing distribution system in linear accelerators

A new field-programmable gate array (FPGA)-based time-to-digital converter (TDC) with a wide dynamic range greater than 20 ms has been developed to monitor the timing of various pulsed devices in the trigger timing distribution system of the KEKB injector linac for the Super KEK B-factory project. The pulsed devices are driven by feeding regular as well as any irregular (or event-based) timing pulses. The timing pulses are distributed to these pulsed devices along the linac beam line with fiber-optic links on the basis of the parameters to be set pulse-by-pulse in the event-based timing and control system within 20 ms. For monitoring the timing as precisely as possible, a 16-ch FPGA-based TDC has been developed on a Xilinx Spartan-6 FPGA equipped on VME board with a resolution of 1 ns. The resolution was achieved by applying a multisampling technique, and the accuracies were 2.6 ns (rms) and less than 1 ns (rms) within the dynamic ranges of 20 ms and 7.5 ms, respectively. The various nonlinear effects were improved by implementing a high-precision external clock with a built-in temperature-compensated crystal oscillator.