The development of high quality seals for silicon patch-clamp chips

Planar patch-clamp is a two-dimensional variation of traditional patch-clamp. By contrast to classical glass micropipette, the seal quality of silicon patch-clamp chips (i.e. seal resistance and seal success rate) have remained poor due to the planar geometry and the nature of the substrate and thus partially obliterate the advantages related to planar patch-clamp. The characterization of physical parameters involved in seal formation is thus of major interest. In this paper, we demonstrate that the physical characterization of surfaces by a set of techniques (Atomic Force Microscopy (AFM), Scanning Electron Microscopy (SEM), X-ray Photoelectron Spectroscopy (XPS), surface energy (polar and dispersive contributions), drop angles, impedance spectroscopy, combined with a statistical design of experiments (DOE)) allowed us discriminating chips that provide relevant performances for planar patch-clamp analysis. Analyses of seal quality demonstrate that dispersive interactions and micropore size are the most crucial physical parameters of chip surfaces, by contrast to surface roughness and dielectric membrane thickness. This multi-scale study combined with electrophysiological validation of chips on a diverse set of cell-types expressing various ion channels (IRK1, hERG and hNav1.5 channels) unveiled a suitable patch-clamp chip candidate. This original approach may inspire novel strategies for selecting appropriate surface parameters dedicated to biochips.