Implementation, analysis and performance evaluation of the IRP replacement policy

As the processor speeds have improved significantly over the years, memory access penalties have become a major issue. The continuously growing gap between the processor and memory performance is making cache misses more and more expensive. In this paper, we suggest that the most common techniques currently implemented, such as least recently used (LRU) and most frequently used (LFU), are inadequate for current computer architectures as they do not complement each other and in many cases lead to the choice of the wrong line to replace. We propose the use of a more improved cache replacement policy technique in order to reduce the number of cache misses and optimise cache performance. Our solution, the improved replacement policy (IRP) merges the positive features in some of the most common policies and eliminates some of their prevalent drawbacks. IRP also employs the concept of spatial locality and therefore efficiently expels only blocks which are not likely to be accessed again. Finally, the IRP performance is compared to LRU and LFU methods.