کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
9672339 | 1450567 | 2005 | 10 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
SiLK⢠etch optimization and electrical characterization for 0.13 μm interconnects
دانلود مقاله + سفارش ترجمه
دانلود مقاله ISI انگلیسی
رایگان برای ایرانیان
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
پیش نمایش صفحه اول مقاله

چکیده انگلیسی
This paper is focused on the optimization of reactive ion etching (RIE) process of low-k polymeric spin-on dielectric (SOD) material, SiLK⢠(Trade mark of Dow Chemical, USA), for 0.13 μm Cu-low-k interconnects technology and subsequent electrical characterization of the metallization. Damascene metallization of SiLK⢠film was integrated with dual hardmask scheme and “trench first” approach. Etch processes for single damascene metal trench and dual damascene via and metal2 trench structures were developed and evaluated. Effect of SiN and SiC films used as one of the hard mask layers and copper cap layers for single and dual damascene formation were also evaluated. The advantages of using SiC over SiN layer as one of the (bottom) dual hardmask layers were demonstrated through the results of electrical performance. Integration issues related to process development were analyzed and discussed. Electrical and reliability performance of testing vehicles associated to different etch criteria were studied. Electrical yield of >90% was obtained for the structures under study, which indicated the wide process margin. The consistency of processes was further demonstrated through the successful integration of eight metal layers with SiLK⢠dielectric film.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 45, Issues 3â4, MarchâApril 2005, Pages 507-516
Journal: Microelectronics Reliability - Volume 45, Issues 3â4, MarchâApril 2005, Pages 507-516
نویسندگان
Ramana Murthy, Y.W. Chen, A. Krishnamoorthy, X.T. Chen,