Technology CAD of silicided Schottky barrier MOSFET for elevated source-drain engineering

The extracted sheet resistivity, as a function of annealing temperature of the silicided S/D contacts, is found to be lower than the conventional contacts currently in use. It is also shown that the Technology CAD has the full capability to predict the possible dc and ac performance enhancement of a MOSFET with elevated S/D structures. While the simulated dc performance shows a clear enhancement, the RF analyses show no performance degradation in the cut-off frequency/propagation delay and also improve the ac performance due to the incorporation of silicide contacts in the S/D region.