Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model

Resistive switching devices are an emerging class of non-volatile memory elements suited for application in passive nano-crossbar arrays. These devices can be modeled as dynamical systems, i.e. memristive devices or memristors for short. The built-in non-linear switching kinetics of these devices enables the performance of 'stateful' logic operations and widens the applicability of memory arrays towards logic operations. In this work, two logic-in-memories approaches are studied by means of dynamical simulations. The first one is the initial 'stateful' logic concept introduced by Boghetti et al., and the second approach is the complementary switch-based concept later suggested by Linn et al. In both cases, the considered device is an electrochemical metallization cell for which good dynamical models are available. The study is limited to the comparison of elementary logic functions-multi-stage logic as well as parallelization features of both approaches are not considered here. A comparison of the elementary logic IMP and NAND operations in terms of reliability, switching energy and basic array compatibility is conducted, and crucial requirements for both approaches are identified.