Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability

The quantum-dot cellular automata have emerged as one of the potential computational fabrics for the emerging nanocomputing systems due to their ultra-high speed and integration density. On the other hand, reversible computing promises low power consuming circuits by nullifying the energy dissipation during the computation. This work targets the design of a reversible arithmetic logic unit (RALU) in the quantum-dot cellular automata (QCA) framework. The design is based on the reversible multiplexer (RM) synthesized by compact 2:1 QCA multiplexers introduced in this paper. The proposed reversible multiplexer is able to achieve 100% fault tolerance in the presence of single missing or additional cell defects in QCA layout. Furthermore, the advantage of modular design of reversible multiplexer is shown by its application in synthesizing the RALU with separate reversible arithmetic unit (RAU) and reversible logic unit (RLU). The RALU circuit can be tested for classical unidirectional stuck-at faults using the constant variable used in this design. The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability.