Switched-current (SI) integrators with reduced effect of transistor mismatches

A comparison is performed, concerning the performance of the proposed bilinear integrator circuits and those that are already introduced in the literature. For this purpose, a fifth-order Chebyshev lowpass SI filter transfer function was simulated. In the case of the proposed filter configurations, the obtained results show that their performance is improved in terms of the effects of MOS transistor parameters mismatch, DC power dissipation, and total required silicon area.