High-speed systolic architectures for finite field inversion

Using a new reformulation of the extended Euclidean algorithm, we propose new two-dimensional systolic architectures for inversion in GF(2m). Our new architectures require considerably less hardware in comparison to the architectures we proposed recently, while achieving the same critical path delays, latencies, and throughputs. Our new architectures compare even more favorably to the inversion architectures proposed previously by others. In common with much previous work in this area, one of our new architectures uses a centralized control mechanism. The other new architecture proposed in this paper uses a distributed control mechanism which results in all the cells in our architecture having the same circuitry regardless of the value of m. Hence the latter new architecture has excellent scalability properties.