Accounting for variability in the design of circuits with organic thin-film transistors

• Transistor parameter variation can be accounted for using methodologies known in Si CMOS technologies.
• Organic transistor parameter variation decreases with the square root of the footprint.
• We estimated the yield of an 8-bit organic RFID transponder chip during the design phase based on variability data.
• A good correspondence to practice has been obtained.

We experimentally verify that the methodology to account for local parameter variations and transistor mismatch known in Si CMOS technologies can be transposed to organic thin-film transistor technologies, and we present a design case that makes use of design for variability. Transistor parameter variation decreases with the square root of the transistor footprint. As a consequence, Monte Carlo simulations which take this effect into account can be executed to better predict the final circuit yield. The design case in this work is an 8-bit, organic RFID transponder chip. The yield prediction by simulations corresponds to the finally observed circuit yield.

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