Achievement of balanced electron and hole mobility in copper-phthalocyanine field-effect transistors by using a crystalline aliphatic passivation layer

Ambipolar charge carrier transport of copper phthalocyanine (CuPc) field-effect transistors with an aliphatic and insulating tetratetracontane (TTC) interlayer are investigated systematically. The TTC interlayer provides a dielectric-semiconductor interface that is free of electron traps. The growth mechanisms of TTC on SiO2SiO2 and CuPc on TTC are studied and charge carrier transport properties are analyzed in dependence of the TTC morphology. Different growth regimes for as-grown and temperature-annealed TTC layers are identified and correlated to the behavior of the respective charge carrier mobilities. Additionally, the thickness of the TTC passivation layer has turned out to influence the grain size of the polycrystalline CuPc layer significantly. Hole and electron transport are affected differently. This behavior can be explained qualitatively with the help of simulations taking into account a difference in grain boundary trap density for electrons and holes. By optimizing the TTC film, balanced charge carrier mobilities can be achieved with μ≈3×10-2cm2/Vs, which are record values for electron transport in CuPc.

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► Ambipolar charge carrier transport is realized in copper phthalocyanine field-effect transistors by using an aliphatic tetratetracontane passivation layer.
► Different growth regimes depending on thickness and treatment of the passivation layer are investigated and can be correlated to the observed charge carrier transport regimes.
► Balanced mobilities for electrons and holes at room temperature are achieved for optimum growth conditions.