Stable low-voltage organic memory transistors with poly(vinyl alcohol) layers stabilized by vinyl silicon oxide interlayers

• Low-voltage organic memory transistors with the PVA/VSiO gate-insulating memory layers.
• The VSiO nanolayers stabilize the PVA memory layers in organic memory transistors.
• Excellent data retention characteristics even after exposure to high temperature.

Here we report stable transistor-type organic memory devices (TOMDs) with poly(vinyl alcohol) (PVA) gate-insulating memory layers stabilized by vinyl-silicon oxide (VSiO) interlayers that are formed via sol-gel reaction of vinyl triethoxysilane (VTES). The thickness of the VSiO interlayers, which are placed between the PVA layers and the poly(3-hexylthiophene) (P3HT) channel layers, was varied up to 250 nm. In order to investigate the thermal stability, all devices were thermally treated at 150 °C for 30 min. The transistor performance and hysteresis characteristics were greatly improved for the PVA-TOMDs with the VSiO interlayers after thermal treatment, whereas the PVA-TOMD without the VSiO interlayer was severely degraded after thermal treatment. In particular, the thermally-treated PVA-TOMD with the 80 nm-thick VSiO interlayer exhibited stable low-voltage driving and outstanding retention characteristics with >10,000 cycles upon continuous writing-reading-erasing-reading operation.

Figure optionsDownload as PowerPoint slide