|کد مقاله||کد نشریه||سال انتشار||مقاله انگلیسی||ترجمه فارسی||نسخه تمام متن|
|1486974||1510693||2016||4 صفحه PDF||سفارش دهید||دانلود رایگان|
• The effect of cold-implantation was investigated in terms of dopant diffusion.
• VTH roll-off, Ioff increment, and contact resistance was improved by cold-IIP.
• The standby current at a short tPD was reduced effectively for the cold-IIP case.
In this paper, to suppress transient enhanced dopant diffusion and improve short channel effects, cold implantation (cold-IIP) was applied to contact PLUG implantation in P-channel metal oxide semiconductor field effect transistors (PMOSFETs). A shallow dopant profile was formed by the suppression of transient enhanced diffusion (TED) due to the reduction of end-of-range (EOR) defects. Threshold voltage roll-off and off current (Ioff) increment, which are caused by a reduction in the distance between the gate and contact, were improved compared with room temperature implantation (RT-IIP). Additionally, the drain induced barrier lowering was improved, and the on-current improvement was attributed to reducing the contact resistance through the reduction of EOR defects. The contact resistance was reduced by ∼6% of the RT-IIP. In the DRAM device, the standby current at a short propagation delay time (tPD) was reduced effectively due to the decrease in the Ioff and contact resistance for the cold-IIP case.
Figure optionsDownload as PowerPoint slide
Journal: Materials Research Bulletin - Volume 82, October 2016, Pages 31–34