کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
1488416 1510722 2014 5 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Process limitation for p-type CuSbS2 semiconductor with high electrical mobility of 20 cm2 V−1 s−1
موضوعات مرتبط
مهندسی و علوم پایه مهندسی مواد سرامیک و کامپوزیت
پیش نمایش صفحه اول مقاله
Process limitation for p-type CuSbS2 semiconductor with high electrical mobility of 20 cm2 V−1 s−1
چکیده انگلیسی


• CuSbS2, a chalcostibite structure, was formed by sintering of CuS and Sb2S3 powders.
• CuSbS2 with low Tm of 535 °C makes its fabrication for solar cell devices easier.
• The best processing condition for CuSbS2 is to sinter at 400 °C for 2 h.
• CuSbS2 with high σ of 15 S cm−1 and the high μ of 20 cm2 V−1 s−1 were obtained.
• Electrical properties of CuSbS2 degraded as composition deviated from stoichiometry.

CuSbS2 bulks have been prepared by reactive sintering the mixture of CuS and Sb2S3 at 350, 375, 400, 450, and 500 °C for 2 h and at the sintering temperature of 400 °C for 0.5, 1, 2, and 3 h under a compensation disc of CuS for atmospheric control. Composition, Structure, morphology, and electrical properties of the sintered bulks were analyzed. The compositions of Cu, Sb and S did not change until the temperature reached at and above 450 °C. The highest electrical conductivity of 15 S cm−1 and the highest mobility of 20 cm2 V−1 s−1 were achieved for CuSbS2 sintered at 400 °C for 2 h. 5% deviations in the Cu/Sb and S/(Cu + Sb) rations caused a serious problem in the degradation of electrical properties, though the CuSbS2 remained as a single phase. Therefore, CuSbS2 is the semiconductor needs to have a controlled composition.

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ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Materials Research Bulletin - Volume 53, May 2014, Pages 290–294
نویسندگان
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