P-type silicon nanowire-based nano-floating gate memory with Au nanoparticles embedded in Al2O3 gate layers

P-type Si nanowire (NW)-based nano-floating gate memory (NFGM) with Au nanoparticles (NPs) embedded in Al2O3 gate layers is characterized in this study. The electrical characteristics of a representative p-type Si NW-based NFGM exhibit a counterclockwise hysteresis loop indicating the trapping and detrapping of electrons in the Au NP nodes of the NFGM device. The threshold voltage shift of the device is 5.4 V and the device has good retention over a lapse of time of 5 × 104 s. On the other hand, the p-type Si NW-based top-gate device without any Au NPs does not exhibit any significant threshold voltage shift. This observation reveals that the memory behavior of the p-type Si NW-based NFGM is due to the trapping and detrapping of charge carriers in the Au NPs.

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